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A Pipelined Multi-Core Machine with Operating System Support Hardware Implementation and Correctness Proof

This work is building on results from the book named “A Pipelined Multi-core MIPS Machine: Hardware Implementation and Correctness” by M. Kovalev, S.M. Müller, and W.J. Paul, published as LNCS 9000 in 2014. It presents, at the gate level, construction and correctness proof of a multi-core machine wi...

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Bibliographic Details
Main Authors: Lutsyk, Petro, Oberhauser, Jonas (Author), Paul, Wolfgang J. (Author)
Format: eBook
Language:English
Published: Cham Springer International Publishing 2020, 2020
Edition:1st ed. 2020
Series:Theoretical Computer Science and General Issues
Subjects:
Microprogramming 
Computer Science
Programming Techniques
Computer Programming
Logic In Ai.
Computer Networks 
Computer Engineering And Networks
Control Structures And Microprogramming
Input/output And Data Communications
Computer Input-output Equipment
Computer Engineering
Theory Of Computation
Logic Programming
Online Access:
Collection: Springer eBooks 2005- - Collection details see MPG.ReNa
Table of Contents:
  • Introductory material
  • on hierarchical hardware design
  • hardware library
  • basic processor design
  • pipelining
  • cache memory systems
  • interrupt mechanism
  • self modification, instruction buffer and nondeterministic ISA
  • memory management units
  • store buffers
  • multi-core processors
  • advanced programmable interrupt controllers (APICs)
  • adding a disk
  • I/O apic

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