Low Power Interconnect Design

This book provides practical solutions for delay and power reduction for on-chip interconnects and buses.  It provides an in depth description of the problem of signal delay and extra power consumption, possible solutions for delay and glitch removal, while considering the power reduction of the tot...

Full description

Bibliographic Details
Main Author: Saini, Sandeep
Format: eBook
Language:English
Published: New York, NY Springer New York 2015, 2015
Edition:1st ed. 2015
Subjects:
Online Access:
Collection: Springer eBooks 2005- - Collection details see MPG.ReNa
Table of Contents:
  • Part I Basics of Interconnect Design
  • Introduction to Interconnects
  • CMOS Buffer
  • Part II Buffer and Schmidt trigger Insertion Techniques for Low Power Interconnect Design
  • Buffer Insertion as a Solution to Interconnect Issues
  • Schmidt Trigger Approach
  • Part III Bus Coding Techniques for Low Power Interconnect Design
  • Bus Coding Techniques