System Level ESD Protection
This book addresses key aspects of analog integrated circuits and systems design related to system level electrostatic discharge (ESD) protection. It is an invaluable reference for anyone developing systems-on-chip (SoC) and systems-on-package (SoP), integrated with system-level ESD protection. The...
| Main Authors: | , |
|---|---|
| Format: | eBook |
| Language: | English |
| Published: |
Cham
Springer International Publishing
2014, 2014
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| Edition: | 1st ed. 2014 |
| Subjects: | |
| Online Access: | |
| Collection: | Springer eBooks 2005- - Collection details see MPG.ReNa |
Table of Contents:
- System 1 Level ESD design
- System Level Test Methods
- On-Chip System Level ESD Devices and Clamps
- Latch-up at System-Level Stress
- IC and Systemn ESD Co-Design