ASIC System Design with VHDL: A Paradigm
Beginning in the mid 1980's, VLSI technology had begun to advance in two directions. Pushing the limit of integration, ULSI (Ultra Large Scale Integration) represents the frontier of the semiconductor processing technology in the campaign to conquer the submicron realm. The application of ULSI,...
| Main Authors: | , |
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| Format: | eBook |
| Language: | English |
| Published: |
New York, NY
Springer US
1989, 1989
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| Edition: | 1st ed. 1989 |
| Series: | The Springer International Series in Engineering and Computer Science
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| Subjects: | |
| Online Access: | |
| Collection: | Springer Book Archives -2004 - Collection details see MPG.ReNa |
Table of Contents:
- 1. Introduction
- 1.1 Problem Statement
- 1.2 Approach
- 1.3 Organization of this Book
- 2. Background
- 2.1 The ASIC Challenge
- 2.2 Computer Architecture Design for Robotic Control
- 2.3 Robotic Kinematics
- 2.4 Summary
- 3. A Conceptual Framework for ASIC Design
- 3.1 The Nature of ASIC Design
- 3.2 The ASIC Design Process
- 3.3 The ASIC Design Hyperspace
- 3.4 The ASIC Design Repertoire
- 3.5 Summary
- 4. The IKS Chip Design Paradigm
- 4.1 Introduction
- 4.2 An ASIC Architecture Design Methodology
- 4.3 The IKS Chip Architecture Design
- 4.4 Summary
- 5. VHDL Simulation of the IKS Chip
- 5.1 Introduction
- 5.2 VHDL Fundamentals
- 5.3 Simulation Objective and Modeling Approach
- 5.4 VHDL Description of the IKS Chip
- 5.5 Simulation Results
- 5.6 Summary
- 6. Conclusion
- 6.1 Summary
- 6.2 Implications and Future Research
- Appendices
- Appendix A. The Closed Form IKS Algorithm for the PUMA
- Appendix B. The IKS Algorithm in Pseudocodes
- Appendix C. Control Signal Definition
- Appendix D. The MACC Encoding Scheme and Code-Maps
- Appendix E. The MACC Microcode for Computing the IKS.