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Timed Boolean Functions A Unified Formalism for Exact Timing Analysis

Timing research in high performance VLSI systems has advanced at a steady pace over the last few years, while tools, especially theoretical mechanisms, lag behind. Much present timing research relies heavily on timing diagrams, which, although intuitive, are inadequate for analysis of large designs...

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Bibliographic Details
Main Authors: Lam, William K.C., Brayton, Robert K. (Author)
Format: eBook
Language:English
Published: New York, NY Springer US 1994, 1994
Edition:1st ed. 1994
Series:The Springer International Series in Engineering and Computer Science
Subjects:
Electrical And Electronic Engineering
Electrical Engineering
Electronic Circuits
Electronic Circuits And Systems
Online Access:
Collection: Springer Book Archives -2004 - Collection details see MPG.ReNa
Table of Contents:
  • 1 Introduction
  • 1.1 Overview
  • 2 Preliminaries
  • 2.1 Boolean Functions
  • 2.2 Cubes and Covering
  • 2.3 Binary Decision Diagrams
  • 2.4 Boolean Networks and Circuits
  • 2.5 Testing/Timing
  • 3 Timed Boolean Functions
  • 3.1 Introduction
  • 3.2 Representation of Binary Signals
  • 3.3 Modeling Timing Behaviors
  • 3.4 Circuit Formulation
  • 3.5 Event Properties
  • 3.6 Representations Over Inputs
  • 3.7 Decision Diagrams
  • 3.8 ENF and TBF
  • 3.9 Optimizations in Real and Boolean Domains
  • 3.10 Summary
  • 4 Exact Delay Computation
  • 4.1 Introduction
  • 4.2 Previous Work
  • 4.3 Classification of Circuit Delay Models
  • 4.4 Formulation for Exact Delay Computation
  • 4.5 Solving the Boolean Linear Program
  • 4.6 Exact 2-vector Delay
  • 4.7 Exact Delay by Sequences of Vectors
  • 4.8 Effects of Gate Delay Lower Bounds
  • 4.9 Delay Computation Using TBF BDD’s
  • 4.10 An Example: 4-bit Ripple Bypass Adder
  • 4.11 Experimental Results
  • 4.12 Minimum Delays
  • 4.13 Exact Minimum Cycle Times for Sequential Circuits
  • 4.14 Summary
  • 5 Wavepipelining
  • 5.1 Introduction
  • 5.2 Wavepipelining of Combinational Circuits
  • 5.3 Wavepipelining of Feedforward Sequential Circuits
  • 5.4 Wavepipelining of Feedback Sequential Circuits
  • 5.5 Analysis of General Wavepipelining
  • 5.6 Manufacturing Precision: a New Dimension for Performance
  • 5.7 Experimental Results
  • 5.8 Summary
  • 6 Exact Circuit Performance Validation
  • 6.1 Introduction
  • 6.2 Delay Fault Testing
  • 6.3 Functional Delay Testing
  • 6.4 Algebraic Relation Between RD sets and Dominated Paths
  • 6.5 Robust Delay
  • 6.6 Trade-off Between Performance Verifiability and Testing
  • 6.7 Performance Verifiability, Probability of Error, and Testability
  • 6.8 Experimental Results
  • 6.9 Exact Verifiable Delay Analysis
  • 6.10 Specification Directed Boolean Synthesis forComplete Per-formance Verifiability
  • 6.11 Summary
  • 7 Conclusions
  • 7.1 Comparing TBF Approach with Other Competitive Methods

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