The Verilog® Hardware Description Language

xv From the Old to the New xvii Acknowledgments xxi 1 Verilog – A Tutorial Introduction 1 Getting Started 2 A Structural Description 2 Simulating the binaryToESeg Driver 4 Creating Ports For the Module 7 Creating a Testbench For a Module 8 11 Behavioral Modeling of Combinational Circuits Procedural...

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Bibliographic Details
Main Authors: Thomas, Donald E., Moorby, Philip R. (Author)
Format: eBook
Language:English
Published: New York, NY Springer US 2002, 2002
Edition:5th ed. 2002
Subjects:
Online Access:
Collection: Springer Book Archives -2004 - Collection details see MPG.ReNa
Description
Summary:xv From the Old to the New xvii Acknowledgments xxi 1 Verilog – A Tutorial Introduction 1 Getting Started 2 A Structural Description 2 Simulating the binaryToESeg Driver 4 Creating Ports For the Module 7 Creating a Testbench For a Module 8 11 Behavioral Modeling of Combinational Circuits Procedural Models 12 Rules for Synthesizing Combinational Circuits 13 14 Procedural Modeling of Clocked Sequential Circuits Modeling Finite State Machines 15 Rules for Synthesizing Sequential Systems 18 Non-Blocking Assignment ("
Physical Description:XXII, 382 p online resource
ISBN:9780306476662