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| 100 |
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|a Chu, Pong P.
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| 245 |
0 |
0 |
|a RTL hardware design using VHDL
|b coding for efficiency, portability, and scalability
|c Pong P. Chu
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| 260 |
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|a Hoboken, N.J.
|b Wiley-Interscience
|c 2006
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| 300 |
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|a xxiii, 669 pages
|b illustrations
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| 505 |
0 |
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|a Includes bibliographical references (pages 665-666) and index
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| 505 |
0 |
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|a Introduction to digital system design -- Overview of hardware description languages -- Basic language constructs of VHDL -- Concurrent signal assignment statements of VHDL -- Sequential statements of VHDL -- Synthesis of VHDL code -- Combinational circuit design : practice -- Sequential circuit design : principle -- Sequential circuit design : practice -- Finite state machine : principle and practice -- Register transfer methodology : principle -- Register transfer methodology : practice -- Hierarchical design in VHDL -- Parameterized design : principle -- Parameterized design : practice -- Clock and synchronization : principle and practice
|
| 653 |
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|a Digital electronics / Data processing / fast
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| 653 |
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|a COMPUTERS / Hardware / General / bisacsh
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| 653 |
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|a VHDL (Langage de description de matériel informatique)
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| 653 |
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|a VHDL (Computer hardware description language) / http://id.loc.gov/authorities/subjects/sh89002702
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|a Digital electronics / Data processing
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| 653 |
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|a COMPUTERS / Computer Engineering / bisacsh
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| 653 |
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|a Électronique numérique / Informatique
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| 653 |
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|a COMPUTERS / Machine Theory / bisacsh
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| 653 |
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|a VHDL (Computer hardware description language) / fast
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|a eng
|2 ISO 639-2
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|a O'Reilly
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|3 Volltext
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|a The skills and guidance needed to master RTL hardware designThis book teaches readers how to systematically design efficient, portable, and scalable Register Transfer Level (RTL) digital circuits using the VHDL hardware description language and synthesis software
|