Integrated circuit design for radiation environments

"The authors structure the book so that readers can understand the problem of radiation effects first, then understand the skills of layout design and ciruit design after. Chapter One and Chapter Two introduce semiconductors and radiation environments including space, atmospheric and terrestria...

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Bibliographic Details
Main Authors: Gaul, Stephen J., Vonno, Nocolaas van (Author), Voldman, Steven H. (Author), Morris, Wesley H. (Author)
Format: eBook
Language:English
Published: Hoboken, NJ Wiley 2020
Subjects:
Online Access:
Collection: O'Reilly - Collection details see MPG.ReNa
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245 0 0 |a Integrated circuit design for radiation environments  |c Stephen J. Gaul, Nicolaas van Vonno, Steven H. Voldman, Wesley H. Morris 
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653 |a Semiconductors / Effect of radiation on / http://id.loc.gov/authorities/subjects/sh85119909 
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520 |a "The authors structure the book so that readers can understand the problem of radiation effects first, then understand the skills of layout design and ciruit design after. Chapter One and Chapter Two introduce semiconductors and radiation environments including space, atmospheric and terrestrial environments. Chapter Three details radiation and semiconductor physics. It discusses elementary particle physics so that readers can see how the areas of semiconductors and fundamental interact. Radioactive decay, field equations and transistors are presented in this section too. Damage mechanisms in semiconductors is covered in Chapter Four, including coverage of radiation damage in silicon devices. This leads on logically to single event effects in the next chapter, covering single event upset (SEU), single event gate rupture (SEGR), single event transient (SET), single event latchup (SEL), and radiation techniques. Chapter Six presents radiation-hard semiconductor process and layout techniques, with information on off-the-shelf process technology, and device specific hardening methods. Helpful SEU semiconductor process solutions for SEU are covered in detail in Chapter Seven. Solutions covered include: wells, p-wells, isolation, triple-well, sub-collectors, deep trench and more. Chapter Eight goes into detail on the area of SEU circuit solutions, while Chapter Nine details latchup semiconductor process solutions. Chapter Ten presents Latchup circuit solutions and concluds with a look at emerging effects in future technologies"--