System Level Design from HW/SW to Memory for Embedded Systems 5th IFIP TC 10 International Embedded Systems Symposium, IESS 2015, Foz do Iguaçu, Brazil, November 3–6, 2015, Proceedings

This book constitutes the refereed proceedings of the 5th IFIP TC 10 International Embedded Systems Symposium, IESS 2015, held in Foz do Iguaçu, Brazil, in November 2015. The 18 full revised papers presented were carefully reviewed and selected from 25 submissions. The papers present a broad discuss...

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Bibliographic Details
Other Authors: Götz, Marcelo (Editor), Schirner, Gunar (Editor), Wehrmeister, Marco Aurélio (Editor), Al Faruque, Mohammad Abdullah (Editor)
Format: eBook
Language:English
Published: Cham Springer International Publishing 2017, 2017
Edition:1st ed. 2017
Series:IFIP Advances in Information and Communication Technology
Subjects:
Online Access:
Collection: Springer eBooks 2005- - Collection details see MPG.ReNa
Description
Summary:This book constitutes the refereed proceedings of the 5th IFIP TC 10 International Embedded Systems Symposium, IESS 2015, held in Foz do Iguaçu, Brazil, in November 2015. The 18 full revised papers presented were carefully reviewed and selected from 25 submissions. The papers present a broad discussion on the design, analysis and verification of embedded and cyber-physical systems including design methodologies, verification, performance analysis, and real-time systems design. They are organized in the following topical sections: cyber-physical systems, system-level design; multi/many-core system design; memory system design; and embedded HW/SW design and applications
Physical Description:XII, 231 p. 92 illus online resource
ISBN:9783319900230