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180102 ||| eng |
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|a 9789811074707
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1 |
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|a Kaushik, Brajesh Kumar
|e [editor]
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|a VLSI Design and Test
|h Elektronische Ressource
|b 21st International Symposium, VDAT 2017, Roorkee, India, June 29 – July 2, 2017, Revised Selected Papers
|c edited by Brajesh Kumar Kaushik, Sudeb Dasgupta, Virendra Singh
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|a 1st ed. 2017
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260 |
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|a Singapore
|b Springer Nature Singapore
|c 2017, 2017
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300 |
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|a XXI, 815 p. 486 illus
|b online resource
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0 |
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|a Digital design -- Analog/mixed signal -- VLSI testing -- Devices and technology -- VLSI architectures -- Emerging technologies and memory -- System design -- Low power design and test -- RF circuits -- Architecture and CAD -- Design verification
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653 |
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|a Computer Communication Networks
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653 |
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|a Computers
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653 |
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|a Computer networks
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653 |
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|a Computer Hardware
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653 |
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|a Processor Architectures
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653 |
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|a Microprocessors
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653 |
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|a Computer architecture
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700 |
1 |
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|a Dasgupta, Sudeb
|e [editor]
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700 |
1 |
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|a Singh, Virendra
|e [editor]
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041 |
0 |
7 |
|a eng
|2 ISO 639-2
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989 |
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|b Springer
|a Springer eBooks 2005-
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490 |
0 |
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|a Communications in Computer and Information Science
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028 |
5 |
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|a 10.1007/978-981-10-7470-7
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856 |
4 |
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|u https://doi.org/10.1007/978-981-10-7470-7?nosfx=y
|x Verlag
|3 Volltext
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|a 004
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520 |
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|a This book constitutes the refereed proceedings of the 21st International Symposium on VLSI Design and Test, VDAT 2017, held in Roorkee, India, in June/July 2017. The 48 full papers presented together with 27 short papers were carefully reviewed and selected from 246 submissions. The papers were organized in topical sections named: digital design; analog/mixed signal; VLSI testing; devices and technology; VLSI architectures; emerging technologies and memory; system design; low power design and test; RF circuits; architecture and CAD; and design verification
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