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160203 ||| eng |
| 020 |
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|a 9783319240046
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| 100 |
1 |
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|a Zhang, Chenxin
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| 245 |
0 |
0 |
|a Heterogeneous Reconfigurable Processors for Real-Time Baseband Processing
|h Elektronische Ressource
|b From Algorithm to Architecture
|c by Chenxin Zhang, Liang Liu, Viktor Öwall
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| 250 |
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|a 1st ed. 2016
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| 260 |
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|a Cham
|b Springer International Publishing
|c 2016, 2016
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| 300 |
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|a XIV, 195 p. 81 illus., 29 illus. in color
|b online resource
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| 505 |
0 |
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|a Introduction -- Digital Hardware Platforms -- Digital Baseband Processing -- The Reconfigurable Cell Array -- Multi-standard Digital Front-End Processing -- Multi-task MIMO Signal Processing -- Future Multi-user MIMO systems – A Discussion -- Conclusion.-
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| 653 |
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|a Electronics and Microelectronics, Instrumentation
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| 653 |
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|a Electronic circuits
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| 653 |
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|a Processor Architectures
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| 653 |
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|a Microprocessors
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| 653 |
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|a Electronics
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| 653 |
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|a Electronic Circuits and Systems
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| 653 |
|
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|a Computer architecture
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| 700 |
1 |
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|a Liu, Liang
|e [author]
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| 700 |
1 |
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|a Öwall, Viktor
|e [author]
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| 041 |
0 |
7 |
|a eng
|2 ISO 639-2
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| 989 |
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|b Springer
|a Springer eBooks 2005-
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| 028 |
5 |
0 |
|a 10.1007/978-3-319-24004-6
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| 856 |
4 |
0 |
|u https://doi.org/10.1007/978-3-319-24004-6?nosfx=y
|x Verlag
|3 Volltext
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| 082 |
0 |
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|a 621.3815
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| 520 |
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|a This book focuses on domain-specific heterogeneous reconfigurable architectures, demonstrating for readers a computing platform which is flexible enough to support multiple standards, multiple modes, and multiple algorithms. The content is multi-disciplinary, covering areas of wireless communication, computing architecture, and circuit design. The platform described provides real-time processing capability with reasonable implementation cost, achieving balanced trade-offs among flexibility, performance, and hardware costs. The authors discuss efficient design methods for wireless communication processing platforms, from both an algorithm and architecture design perspective. Coverage also includes computing platforms for different wireless technologies and standards, including MIMO, OFDM, Massive MIMO, DVB, WLAN, LTE/LTE-A, and 5G. •Discusses reconfigurable architectures, including hardware building blocks such as processing elements, memory sub-systems, Network-on-Chip (NoC), and dynamic hardware reconfiguration; •Describes a unique design and optimization methodology, applied to different areas and levels, including communication theory, hardware implementation, and software support; •Demonstrates design trade-offs during different development phases and enables readers to apply similar techniques to various applications
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