TRON Project 1989 Open-Architecture Computer Systems

It is almost six years since the inauguration of the TRON project, a con­ cept first proposed by Dr. K. Sakamura of the University of Tokyo, and it is almost 2 years since the foundation of the TRON Association on March 1988. The number of regular member companies registered in the TRON Association...

Full description

Bibliographic Details
Other Authors: Sakamura, Ken (Editor)
Format: eBook
Language:English
Published: Tokyo Springer Japan 1988, 1988
Edition:1st ed. 1988
Subjects:
Online Access:
Collection: Springer Book Archives -2004 - Collection details see MPG.ReNa
LEADER 03347nmm a2200325 u 4500
001 EB000710180
003 EBX01000000000000000563262
005 00000000000000.0
007 cr|||||||||||||||||||||
008 140122 ||| eng
020 |a 9784431681021 
100 1 |a Sakamura, Ken  |e [editor] 
245 0 0 |a TRON Project 1989  |h Elektronische Ressource  |b Open-Architecture Computer Systems  |c edited by Ken Sakamura 
250 |a 1st ed. 1988 
260 |a Tokyo  |b Springer Japan  |c 1988, 1988 
300 |a X, 324 p  |b online resource 
505 0 |a Key Note Address -- The Computerized Society -- 1: ITRON -- MR3210 Based on ITRON2 Specification Realtime OS -- REALOS/F32: Implementation of ITRON2 Specification on GMICRO F32 -- An Integrated Approach to H18 System Development -- Application of ITRON Specification Based OS in the Mobile Radio Communication System -- The Design of a Real-Time Operating System Kernel for the Gmicro Family of Processors -- HI32: An ITRON-Specification Operating System for the H32/200 -- 2: BTRON -- The µ BTRON Bus: Functions and Applications -- Implementation Issues of the TACL/TULS Language System on BTRON -- 3: CTRON -- Design of General Rules in CTRON Interfaces -- The Basic Concept of CTRON Switching Control -- The CTRON Interface Validation System -- Design of CTRON Fault Tolerance Functions -- An Experimental Implementation for One level Storage On CTRON KERNEL -- Design of the CTRON Application Oriented Communication Control Interface -- 4: TRONCHIP -- Advanced Optimizing Compilers Boost Performance On TRON Specification Chip Pipelined CISC Architectures -- Design of Microcomputer Systems Using the TX1 Family LSIs -- Implementation and Performance Evaluation of the M32/100 -- Generation and Debugging of Optimized Code for the TRON Architecture -- List of Contributors -- Keywords Index 
653 |a Operating Systems 
653 |a Operating systems (Computers) 
653 |a Processor Architectures 
653 |a Microprocessors 
653 |a Special Purpose and Application-Based Systems 
653 |a Computers, Special purpose 
653 |a Computer architecture 
041 0 7 |a eng  |2 ISO 639-2 
989 |b SBA  |a Springer Book Archives -2004 
028 5 0 |a 10.1007/978-4-431-68102-1 
856 4 0 |u https://doi.org/10.1007/978-4-431-68102-1?nosfx=y  |x Verlag  |3 Volltext 
082 0 |a 004.22 
520 |a It is almost six years since the inauguration of the TRON project, a con­ cept first proposed by Dr. K. Sakamura of the University of Tokyo, and it is almost 2 years since the foundation of the TRON Association on March 1988. The number of regular member companies registered in the TRON Association as of November 1988 is 145 which is a new re­ cord for the Association. Some of this year's major activities that I would particularly like to mention are: - Over 50 TRON project-related products have been or are about to be introduced to the marketplace, according to a preliminary report from the Future Study Committee of the TRON Association. In par­ ticular, I am happy to say that the ITRON subproject, which is ahead of the other subprojects, has progressed so far that several papers on ITRON applications will be presented at this conference, which means that the ITRON specifications are now ready for application to em­ bedded commercial and industrial products