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Fault Diagnosis and Fault Tolerance A Systematic Approach to Special Topics

With the rapid growth of integration scale of VLSI chips and the present need for reliable computers in space exploration, fault diagnosis and fault toleran­ ce have become more important than before, and hence reveal a lot of interest­ ing topics which attract many researchers to make a great numbe...

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Bibliographic Details
Main Author: Chen, Tinghuai
Format: eBook
Language:English
Published: Berlin, Heidelberg Springer Berlin Heidelberg 1992, 1992
Edition:1st ed. 1992
Subjects:
Electronics And Microelectronics, Instrumentation
Computer Science
Logic Design
Discrete Mathematics
Electronics
Theory Of Computation
Online Access:
Collection: Springer Book Archives -2004 - Collection details see MPG.ReNa
Table of Contents:
  • 7.6 Conclusion
  • References
  • 1 Four-Valued Logic and Its Applications
  • 1.1 Introduction
  • 1.2 Mathematical Basis
  • 1.3 STAR Expansions, Boolean Difference and Boolean Differential
  • 1.4 Combined Components
  • 1.5 Boolean Equations
  • 1.6 Test Generation for Combinational Circuits
  • 1.7 Statical Test Generation for Sequential Circuits
  • 1.8 Identification of Hazards and Dynamic Testing
  • 1.9 Transition Logic
  • 1.10 Comparison with Other Logics
  • References
  • 2 Computer System Diagnosis and Society Diagnosis
  • 2.1 Introduction (PMC Model)
  • 2.2 One Step System Diagnosis for PMC Model
  • 2.3 The Extension of System Diagnosis
  • 2.4 The Application of System Diagnosis
  • References
  • 3 Testability Design via Testability Measures
  • 3.1 Introduction
  • 3.2 Testability Design
  • 3.3 Design for Testability at Module Level
  • 3.4 Applications
  • References
  • 4 NMRC: A Technique for Redundancy
  • 4.1 Introduction
  • 4.2 NMRC System Model
  • 4.3 Analysis of Fault Tolerance Capability
  • 4.4 Optimal NMRC System Design
  • 4.5 An Example for Comparison Analysis
  • 4.6 Conclusion
  • References
  • 4.A.1 The Proof of Theorem 4.4
  • 4.A.2 The Proof of Lemma 2
  • 5 Fault Tolerance of Switching Interconnection ß-Networks
  • 5.1 Introduction
  • 5.2 General Inequalities
  • 5.3 ISE-MISE-RMISE
  • 5.4 C 1n,t ß-networks
  • 5.5 RFT Network
  • 5.6 Conclusion
  • References
  • 6 The Connectivity of Hypergraph and the Design of Fault Tolerant Multibus Systems
  • 6.1 Introduction
  • 6.2 Connectivity of Hypergraph
  • 6.3 BIB Design and the Optimized Multibus System
  • 6.4 WBIB and the Optimized Multibus System
  • 6.4.4 WBIB Design for ?=3
  • 6.5 Generation of WBIB to Other Networks
  • 6.6 Conclusion
  • References
  • Appendix: The Proof of Theorem 6.6
  • 7 TMR Design of Distributed System for Sequential Faults
  • 7.1 Introduction
  • 7.2 DFT Concept
  • 7.3 The FaultTolerance Degree
  • 7.4 The Relationship Between the Architecture and the Fault Tolerance Degree
  • 7.5 Optimal Design

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