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140122 ||| eng |
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|a 9783642743603
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| 100 |
1 |
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|a Treitinger, Ludwig
|e [editor]
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| 245 |
0 |
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|a Ultra-Fast Silicon Bipolar Technology
|h Elektronische Ressource
|c edited by Ludwig Treitinger, Mitiko Miura-Mattausch
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| 250 |
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|a 1st ed. 1988
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| 260 |
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|a Berlin, Heidelberg
|b Springer Berlin Heidelberg
|c 1988, 1988
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| 300 |
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|a IX, 167 p. 16 illus
|b online resource
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| 505 |
0 |
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|a 4.4 Benefits and Device Performance -- 4.5 Application to Practical Devices -- 4.6 Problems and Limiting Aspects -- 4.7 Conclusion -- References -- 5. A Salicide Base Contact Technology (SCOT) for Use in High Speed Bipolar VLSI -- 5.1 Background -- 5.2 Gate-Speed Simulation -- 5.3 Process and Transistor Design -- 5.4 Gate Speed and Prescaler IC -- 5.5 VSC Masterslice -- 5.6 Conclusion -- References -- 6. Advanced Self-Alignment Technologies and Resulting Structures of High-Speed Bipolar Transistors -- 6.1 Background -- 6.2 SICOS Device Structure -- 6.3 Fabrication Process -- 6.4 Electrical Characteristics -- 6.5 Advanced Process Technology and Electrical Results for High-Speed SICOS Transistors -- 6.6 Conclusions -- References -- 7. Trends in Heterojunction Silicon Bipolar Transistors -- 7.1 Background -- 7.2 Polysilicon Emitter Bipolar Transistors -- 7.3 Epitaxial Emitter Bipolar Transistors -- 7.4 Heterojunction Bipolar Transistors -- 7.5 Conclusions -- References --
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| 505 |
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|a 8. Molecular Beam Epitaxy of Silicon-Based Bipolar Structures -- 8.1 Strengths of Si-MBE -- 8.2 Silicon Monolithic Millimeter Wave Integrated Circuits -- 8.3 Si/SiGe-Heterojunction Bipolar Transistors -- 8.4 Conclusions -- References
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| 505 |
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|a 1. History, Present Trends, and Scaling of Silicon Bipolar Technology -- 1.1 Introduction -- 1.2 Polysilicon Emitter Contact -- 1.3 Self-alignment with Polysilicon Layers -- 1.4 Scaling Problems -- 1.5 Heterojunction Transistors -- 1.6 Topical Modelling Problems -- 1.7 Demonstration Circuits -- 1.8 Summary and Prospects -- References -- 2. Self-Aligning Technology for Sub-100nm Deep Base Junction Transistors -- 2.1 Background -- 2.2 Limitations of the Modern Self-Aligned Transistors -- 2.3 BSA Technology -- 2.4 Summary -- References -- 3. Vertical Scaling Considerations for Polysilicon-Emitter Bipolar Transistors -- 3.1 Polysilicon Emitters -- 3.2 Base Charge Control -- 3.3 Transit Time Considerations -- 3.4 Conclusion -- References -- 4. Trench Isolation Schemes for Bipolar Devices: Benefits and Limiting Aspects -- 4.1 Background -- 4.2 Process Technologies and Device Structures (First Generation) -- 4.3 Process Technologies and Device Structures (Second Generation) --
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| 653 |
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|a Electronics and Microelectronics, Instrumentation
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| 653 |
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|a Thin films
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|a Optical Materials
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| 653 |
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|a Surfaces, Interfaces and Thin Film
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| 653 |
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|a Electronics
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| 653 |
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|a Optical materials
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| 653 |
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|a Surfaces (Technology)
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| 700 |
1 |
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|a Miura-Mattausch, Mitiko
|e [editor]
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| 041 |
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7 |
|a eng
|2 ISO 639-2
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| 989 |
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|b SBA
|a Springer Book Archives -2004
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| 490 |
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|a Springer Series in Electronics and Photonics
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| 028 |
5 |
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|a 10.1007/978-3-642-74360-3
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| 856 |
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|u https://doi.org/10.1007/978-3-642-74360-3?nosfx=y
|x Verlag
|3 Volltext
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|a 620.44
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| 520 |
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|a Since the first bipolar transistor was investigated in 1947, enormous efforts have been devoted to semiconductor devices. The strong world wide competition in fabricating metal-oxide-semiconductor field-effect of develop transistor (MOSFET) memories has accelerated the pace ments in semiconductor technology. Bipolar transistors play a major role due to their high-speed performance. Delay times of about 20 ps per gate have already been achieved. Because of this rapid technologi cal progress, it is difficult to predict the future with any certainty. In 1987 a special session on ultrafast bipolar transistors was held at the European Solid-State Device Research Conference. Its aim was to sum marize the most recent developments and to discuss the future of bip olar transistors. This book is based on that session but also includes contributions by other participants, such that a broad range of up-to is presented. Several conclusions can be drawn from date information this information: the first and most important is the very large poten tial for future progress still existing in this field. This progress is char acterized by the drive towards higher speed and lower power con sumption required for complex single-chip systems, as well as by sev eral concrete technological implementations for fulfilling these dem is that a large part of this potential can be ands. The second conclusion realized by rather unsophisticated techniques and configurations well suited to uncomplicated transfer to fabrication
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