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Formal Methods in Computer-Aided Design First International Conference, FMCAD '96, Palo Alto, CA, USA, November 6 - 8, 1996, Proceedings

This book constitutes the refereed proceedings of the First International Conference on Formal Methods in Computer-Aided Design, FMCAD '96, held in Palo Alto, California, USA, in November 1996. The 25 revised full papers presented were selected from a total of 65 submissions; also included are...

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Bibliographic Details
Other Authors: Srivas, Mandayam (Editor), Camilleri, Albert (Editor)
Format: eBook
Language:English
Published: Berlin, Heidelberg Springer Berlin Heidelberg 1996, 1996
Edition:1st ed. 1996
Series:Lecture Notes in Computer Science
Subjects:
Computer Science Logic And Foundations Of Programming
Computer Science
Computer-aided Engineering (cad, Cae) And Design
Formal Languages And Automata Theory
Computers
Computer Networks 
Computer Hardware
Computer Engineering And Networks
Machine Theory
Computer-aided Engineering
Computer Engineering
Theory Of Computation
Online Access:
Collection: Springer Book Archives -2004 - Collection details see MPG.ReNa
Table of Contents:
  • Verification using uninterpreted functions and finite instantiations
  • Formal verification of the Island Tunnel Controller using Multiway Decision Graphs
  • VIS
  • PVS: Combining specification, proof checking, and model checking
  • HOL Light: A tutorial introduction
  • A tutorial on digital design derivation using DRS
  • ACL2 theorems about commercial microprocessors
  • Formal synthesis in circuit design — A classification and survey
  • Formal specification and verification of VHDL
  • Specification of control flow properties for verification of synthesized VHDL designs
  • An algebraic model of correctness for superscalar microprocessors
  • Mechanically checking a lemma used in an automatic verification tool
  • Automatic generation of invariants in processor verification
  • A brief study of BDD package performance
  • Local encodingtransformations for optimizing OBDD-representations of finite state machines
  • Decomposition techniques for efficient ROBDD construction
  • The need for formal methods for integrated circuit design
  • Verification of all circuits in a floating-point unit using word-level model checking
  • *BMDs can delay the use of theorem proving for verifying arithmetic assembly instructions
  • Modular verification of multipliers
  • Verification of IEEE compliant subtractive division algorithms
  • Hierarchical verification of two-dimensional high-speed multiplication in PVS: A case study
  • Experiments in automating hardware verification using inductive proof planning
  • Verifying nondeterministic implementations of deterministic systems
  • A methodology for processor implementation verification
  • Coverage-directed test generation using symbolic techniques
  • Self-consistency checking
  • Inverting the abstraction mapping: A methodology for hardware verification
  • Validity checking for combinations of theories with equality
  • A unified approach for combining different formalisms for hardware verification
  • BDDs vs. Zero-Suppressed BDDs: for CTL symbolic model checking of Petri nets
  • HDL-based integration of formal methods and CAD tools in the PREVAIL environment

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