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140122 ||| eng |
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|a 9783540387466
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100 |
1 |
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|a Makedon, Fillia
|e [editor]
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245 |
0 |
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|a VLSI Algorithms and Architectures
|h Elektronische Ressource
|b Aegean Workshop on Computing, Loutraki, Greece, July 8-11, 1986. Proceedings
|c edited by Fillia Makedon, Kurt Mehlhorn, T. Papatheodorou, P. Spirakis
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250 |
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|a 1st ed. 1986
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260 |
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|a Berlin, Heidelberg
|b Springer Berlin Heidelberg
|c 1986, 1986
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300 |
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|a X, 330 p
|b online resource
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505 |
0 |
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|a Digital filtering in VLSI -- Two processor scheduling is in NC -- Breaking symmetry in synchronous networks -- Parallel ear decomposition search (EDS) and st-numbering in graphs -- A unifying framework for systolic designs -- Optimal tradeoffs for addition on systolic arrays -- On the connection between hexagonal and unidirectional rectangular systolic arrays -- Lower bounds for sorting on mesh-connected architectures -- Diogenes, circa 1986 ????? ??? ??? ????o ????o?o -- Nonsequential computation and laws of nature -- Linear algorithms for two CMOS layout problems -- Some new results on a restricted channel routing problem -- Efficient modular design of TSC checkers for m-out-of-2m codes -- Vlsi algorithms and pipelined architectures for solving structured linear system -- A high-performance single-chip vlsi signal processor architecture -- Exploiting hierarchy in VLSI design -- A polynomial algorithm for recognizing images of polyhedra -- Parallel tree techniques and code optimization -- AT2-optimal galois field multiplier for VLSI -- Linear and book embeddings of graphs -- Efficient parallel evaluation of straight-line code and arithmetic circuits -- A logarithmic boolean time algorithm for parallel polynomial division -- A polynomial algorithm for recognizing small cutwidth in hypergraphs -- A generalized topological sorting problem -- Combinational static CMOS networks -- Fast and efficient parallel linear programming and linear least squares computations -- On the time required to sum n semigroup elements on a parallel machine with simultaneous writes -- A comparative study of concurrency control methods in B-trees -- Generalized river routing — Algorithms and performance bounds
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653 |
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|a Electronics and Microelectronics, Instrumentation
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653 |
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|a Computer science
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653 |
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|a Electrical and Electronic Engineering
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653 |
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|a Electrical engineering
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653 |
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|a Processor Architectures
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653 |
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|a Microprocessors
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653 |
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|a Electronics
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653 |
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|a Theory of Computation
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653 |
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|a Computer architecture
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700 |
1 |
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|a Mehlhorn, Kurt
|e [editor]
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700 |
1 |
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|a Papatheodorou, T.
|e [editor]
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700 |
1 |
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|a Spirakis, P.
|e [editor]
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041 |
0 |
7 |
|a eng
|2 ISO 639-2
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989 |
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|b SBA
|a Springer Book Archives -2004
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490 |
0 |
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|a Lecture Notes in Computer Science
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028 |
5 |
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|a 10.1007/3-540-16766-8
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856 |
4 |
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|u https://doi.org/10.1007/3-540-16766-8?nosfx=y
|x Verlag
|3 Volltext
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082 |
0 |
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|a 621.3
|