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High-Speed Clock Network Design

High-Speed Clock Network Design is a collection of design concepts, techniques and research works from the author for clock distribution in microprocessors and high-performance chips. It is organized in 11 chapters

Bibliographic Details
Main Author:	Zhu, Qing K.
Format:	eBook
Language:	English
Published:	New York, NY Springer US 2003, 2003
Edition:	1st ed. 2003
Subjects:	Electrical And Electronic Engineering Electronic Circuits And Systems Electronic Circuits Electrical Engineering Computer-aided Engineering Computer-aided Engineering (cad, Cae) And Design
Online Access:	https://doi.org/10.1007/978-1-4757-3705-9?nosfx=y
Collection:	Springer Book Archives -2004 - Collection details see MPG.ReNa

Description
Summary:	High-Speed Clock Network Design is a collection of design concepts, techniques and research works from the author for clock distribution in microprocessors and high-performance chips. It is organized in 11 chapters
Physical Description:	VIII, 188 p online resource
ISBN:	9781475737059