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VHDL’92 The New Features of the VHDL Hardware Description Language

An open process of restandardization, conducted by the IEEE, has led to the definitions of the new VHDL standard. The changes make VHDL safer, more portable, and more powerful. VHDL also becomes bigger and more complete. The canonical simulator of VHDL is enriched by new mechanisms, the predefined e...

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Bibliographic Details
Main Authors: Bergé, Jean-Michel, Fonkoua, Alain (Author), Maginot, Serge (Author), Rouillard, Jacques (Author)
Format: eBook
Language:English
Published: New York, NY Springer US 1993, 1993
Edition:1st ed. 1993
Series:The Springer International Series in Engineering and Computer Science
Subjects:
Compilers (computer Programs)
Compilers And Interpreters
Computer-aided Engineering (cad, Cae) And Design
Electrical And Electronic Engineering
Electrical Engineering
Control Theory
Systems Theory, Control
Electronic Circuits
System Theory
Computer-aided Engineering
Electronic Circuits And Systems
Online Access:
Collection: Springer Book Archives -2004 - Collection details see MPG.ReNa
Table of Contents:
  • 1. Designer’s Concerns
  • 2. Spirit of VHDL’92
  • New Simulation Mechanisms
  • 3. Last-Delta Activation: Postponed Process
  • 4. Shared (Global) Variables
  • New Structuring Mechanisms
  • 5. Direct Instantiation
  • 6. Incremental Binding
  • 7. Groups
  • New Interfacing Mechanisms
  • 8. Foreign Interfaces
  • 9. Reading & Writing Files
  • 10. Impure Functions
  • New Predefined Operators, Functions & Attributes
  • 11. Shift and Rotate Operators
  • 12. XNOR Operator
  • 13. Predefined Attribute Driving_Value (and ‘Driving)
  • 14. Predefined Attribute ‘Ascending
  • 15. Predefined Attributes ‘Behavior & ’Structure
  • 16. Predefined Attributes ‘Image & ’Value
  • 17. Attributes ‘Path_Name ’Instance_Name ’Simple_Name
  • Slight Enhancements
  • 18. Inertial Signal Assignment Statement
  • 19. Declarative Part in Generate Statements
  • 20. Mapping Expressions to Input Ports
  • 21. The New Character Set
  • 22. Identifier Generalization
  • 23. Alias Generalization
  • 24. Access to Predefined Operators
  • 25. Extension of Bit String Literals
  • Language Simplifications
  • 26. Concurrent Signal Assignment
  • 27. Report Statement
  • 28. Concatenation Operator
  • 29. Bracketing: Syntax Consistency
  • Clarifications
  • 30. Static Expressions
  • 31. Run-Time Checks
  • 32. Interface List
  • 33. Association List
  • 34. Resolved Subelements in Composites
  • 35. Labels & User-Defined Attributes
  • 36. Miscellaneous
  • Annex
  • 37. List of Reserved Words
  • 38. Informal Glossary
  • 39. Index

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