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|a 9781461504634
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|a Maston, Gregory A.
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| 245 |
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|a Elements of STIL
|h Elektronische Ressource
|b Principles and Applications of IEEE Std. 1450
|c by Gregory A. Maston, Tony R. Taylor, Julie N. Villar
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| 250 |
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|a 1st ed. 2003
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| 260 |
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|a New York, NY
|b Springer US
|c 2003, 2003
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| 300 |
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|a XIX, 291 p
|b online resource
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| 505 |
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|a 13.5 Intra-cycle Dynamic Levels -- 13.6 DCSequence -- 13.7 Inherit Constructs -- 13.8 STIL Blocks and Data -- 14 More Pattern Constructs -- 14.1 Event-based Pattern Data -- 15 User Extensions -- 15.1 UserKeywords statement -- 15.2 Ambiguous Scenarios -- 15.3 UserFunctions -- 16 Additional Test Considerations -- 16.1 The Concept of Test Constraints -- 17 Name Mapping -- 17.1 Signal Names -- Terminology -- STIL Syntax Summary
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|a 9.2 One-Waveform-Per-Table -- 9.3 Happier Mediums -- 9.4 Waveform Grouping/Merging -- 9.5 WGL Pattern Data and WaveformCharacters -- 10 Advanced Timing -- 10.1 Incremental Timing Definitions -- 10.2 Inherit Strategies -- 10.3 SubWaveforms -- 10.4 Multiple Data Waveforms -- 11 Procedures and Macros -- 11.1 Structured Test Development -- 11.2 STIL Procedures -- 11.3 MacroDefs -- 11.4 Differences Between Procedures and Macros -- 11.5 Procedure and Macro Parameters -- 11.6 Calling Procedures and Macros -- 11.7 Using Named Procedures/MacroDefs Blocks -- 11.8 WGL Procedures and Macros -- 12 STIL Scan -- 12.1 Scan Design -- 12.2 STIL Scan Constructs -- 12.3 Scan Data Alignment (“Scan Padding”) -- 12.4 More Considerations on Scan Constructs -- 12.5 Scan Groups -- 12.6 An Example: Transition Testing -- 12.7 WGL Scan -- 13 STIL Levels -- 13.1 STIL Statement with Extensions -- 13.2 Static and Dynamic Levels -- 13.3 Static Levels -- 13.4 Inter-cycle Dynamic Levels --
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|a 1 Foundations of STIL -- 1.1 Introduction -- 1.2 Organization of this Book -- 1.3 History -- 1.4 Foundation Efforts -- 1.5 Scope of STIL and Follow-On Efforts -- 1.6 Parallel Standards -- 2 STIL Test -- 2.1 Test Stresses -- 2.2 Test Strategies -- 2.3 Test Behaviors -- 2.4 Test Induced Faults -- 2.5 Other Applications of STIL -- 3 Signals -- 3.1 Signals -- 3.2 Signal Arrays -- 3.3 SignalGroups -- 3.4 STIL Statement Constructs and Block Structure -- 3.5 Signals and SignalGroups Syntax -- 3.6 Signal and SignalGroup Attributes -- 3.7 The Test Attributes -- 3.8 WGL Signals -- 4 Timing -- 4.1 The Timing Block -- 4.2 Event Statements -- 4.3 Basic Time Expressions -- 4.4 Waveforms -- 4.5 WaveformCharacters -- 4.6 Merging Common Waveforms -- 4.7 Event Ordering and Persistence -- 4.8 Maintaining Related Events -- 4.9 Special Events -- 4.10 The Rest of the Timing Block Syntax -- 4.11 WGL Timing Constructs -- 5 Patterns -- 5.1 Fundamental Pattern Constructs -- 5.2 Statement Order Dependency --
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|a 5.3 WaveformTable Reference Statement -- 5.4 Signal Assignment -- 5.5 Vectors -- 5.6 Conditions -- 5.7 Incremental Behavior -- 5.8 Loop Constructs -- 5.9 Labels -- 5.10 Stop and IDDQTestPoint -- 5.11 Breakpoint -- 5.12 WGL Pattern Constructs -- 6 Tying It All Together -- 6.1 Basic STIL Information Flow -- 6.2 The PatternBurst -- 6.3 The PatternExec -- 6.4 Additional STIL Constructs -- 6.5 STIL Block Order -- 6.6 WGL Constructs -- 7 Files and the Include Statement -- 7.1 Include Statement -- 7.2 The IfNeed Option -- 7.3 Additional File Constructs and Behaviors -- 8 Specifications -- 8.1 Device Operating Specifications -- 8.2 STIL Extensions to the Spec Variables -- 8.3 Spec and Category -- 8.4 Spec Variable Resolution -- 8.5 Based Expressions -- 8.6 Selector -- 8.7 Applying Spec Variables -- 8.8 More Spec Constructs -- 8.9 Relative Waveform Timing -- 8.10 Styles of Timing Representation -- 8.11 WGL Specification Constructs -- 9 Partitioning Timing -- 9.1 All-Waveforms-in-One-Table --
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| 653 |
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|a Computer-Aided Engineering (CAD, CAE) and Design
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| 653 |
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|a Electrical and Electronic Engineering
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| 653 |
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|a Electrical engineering
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| 653 |
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|a Electronic circuits
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| 653 |
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|a Computer-aided engineering
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| 653 |
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|a Electronic Circuits and Systems
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| 700 |
1 |
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|a Taylor, Tony R.
|e [author]
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| 700 |
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|a Villar, Julie N.
|e [author]
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| 041 |
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7 |
|a eng
|2 ISO 639-2
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| 989 |
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|b SBA
|a Springer Book Archives -2004
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| 490 |
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|a Frontiers in Electronic Testing
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| 028 |
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|a 10.1007/978-1-4615-0463-4
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| 856 |
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|u https://doi.org/10.1007/978-1-4615-0463-4?nosfx=y
|x Verlag
|3 Volltext
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| 082 |
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|a 621.3815
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| 520 |
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|a Standard • Test In. terface ____________________ Language So I was wrong. I was absolutely sure that by having an IEEE Standard defined, reviewed, and accepted, that I wouldn't need to write a book about it as well. The Standard would be the complete reference. And be aware - this book does not serve as a replacement to the IEEE Std. 1450 document. You should have a copy of the Standard as you go through this book. I realized that the Standard would not be the complete reference, about the time that the Working Group started to put notes into the draft proposa- notes to elaborate decisions in the Working Group, but that would be removed in the final draft. Then, once the Standard was accepted I became the central point of contact for people who just picked up the Standard, who didn't have the benefit of the Working Group discussions, who only had available that one final sentence in the Standard and who didn't benefit from the perspective of where those words came from. Sometimes those questions have resulted in clarifications to the Standard. Sometimes I would respond to those questions with more background and perspective as well. It is this additional background and perspective I hope you find in this book
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