Testing and Reliable Design of CMOS Circuits
In the last few years CMOS technology has become increas ingly dominant for realizing Very Large Scale Integrated (VLSI) circuits. The popularity of this technology is due to its high den sity and low power requirement. The ability to realize very com plex circuits on a single chip has brought ab...
| Main Authors: | , |
|---|---|
| Format: | eBook |
| Language: | English |
| Published: |
New York, NY
Springer US
1990, 1990
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| Edition: | 1st ed. 1990 |
| Series: | The Springer International Series in Engineering and Computer Science
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| Subjects: | |
| Online Access: | |
| Collection: | Springer Book Archives -2004 - Collection details see MPG.ReNa |
Table of Contents:
- 1. Introduction
- 1.1 What is Testing ?
- 1.2 Faults and Errors
- 1.3 Different Types of CMOS Circuits
- 1.4 Gate-Level Model
- 1.5 Fault Models
- References
- Problems
- 2. Test Invalidation
- 2.1 The Test Invalidation Problem
- 2.2 Robust Testability of Dynamic CMOS Circuits
- References
- Additional Reading
- Problems
- 3. Test Generation for Dynamic CMOS Circuits
- 3.1 Path Sensitization and D-Algorithm
- 3.2 Boolean Difference
- 3.3 Fault Collapsing
- 3.4 Redundancy in Circuits
- 3.5 Testing of Domino CMOS Circuits
- 3.6 Testing of CVS Circuits
- References
- Additional Reading
- Problems
- 4. Test Generation for Static CMOS Circuits
- 4.1 Non-Robust Test Generation
- 4.2 Robust Test Generation
- References
- Additional Reading
- Problems
- 5. Design for Robust Testability
- 5.1 Testable Designs Using Extra Inputs
- 5.2 Testable Designs Using Complex Gates
- 5.3 Testable Designs Using Parity Gates
- 5.4 Testable Designs Using Shannon’s Theorem
- References
- Additional Reading
- Problems
- 6. Self-Checking Circuits
- 6.1 Concepts and Definitions
- 6.2 Error-Detecting Codes
- 6.3 Self-Checking Checkers
- 6.4 Self-Checking Functional Circuits
- References
- Additional Reading
- Problems
- 7. Conclusions
- References