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High Performance Memory Systems

Today, the more rapid rate of speed increase in microprocessor technology than in memory has created a serious memory gap (or "wall") for computer designers and manufacturers. Edited by leading international authorities in the field, High Performance Memory Systems surveys advances in tech...

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Bibliographic Details
Other Authors: Hadimioglu, Haldun (Editor), Kaeli, David (Editor), Kuskin, Jeffrey (Editor), Nanda, Ashwini (Editor)
Format: eBook
Language:English
Published: New York, NY Springer New York 2004, 2004
Edition:1st ed. 2004
Subjects:
Electronic Digital Computers / Evaluation
System Performance And Evaluation
Computer Networks 
Computer Engineering And Networks
Processor Architectures
Microprocessors
Computer Engineering
Computer Architecture
Online Access:
Collection: Springer Book Archives -2004 - Collection details see MPG.ReNa
Table of Contents:
  • 1 Introduction to High-Performance Memory Systems — scan all
  • 1.1 Coherence, Synchronization, and Allocation
  • 1.2 Power-Aware, Reliable, and Reconfigurable Memory
  • 1.3 Software-Based Memory Tuning
  • 1.4 Architecture-Based Memory Tuning
  • 1.5 Workload Considerations
  • I Coherence, Synchronization, and Allocation
  • 2 Speculative Locks: Concurrent Execution of Critical Sections in Shared-Memory Multiprocessors
  • 3 Dynamic Verification of Cache Coherence Protocols
  • 4 Timestamp-Based Selective Cache Allocation
  • II Power-Aware, Reliable, and Reconfigurable Memory
  • 5 Power-Efficient Cache Coherence
  • 6 Improving Power Efficiency with an Asymmetric Set-Associative Cache
  • 7 Memory Issues in Hardware-Supported Software Safety
  • 8 Reconfigurable Memory Module in the RAMP System for Stream Processing
  • III Software-Based Memory Tuning
  • 9 Performance of Memory Expansion Technology (MXT)
  • 10 Profile-Tuned Heap Access
  • 11 Array Merging: A Technique for Improving Cache and TLB Behavior
  • 12 Software Logging under Speculative Parallelization
  • IV Architecture-Based Memory Tuning
  • 13 An Analysis of Scalar Memory Accesses in Embedded and Multimedia Systems
  • 14 Bandwidth-Based Prefetching for Constant-Stride Arrays
  • 15 Performance Potential of Effective Address Prediction of Load Instructions
  • V Workload Considerations
  • 16 Evaluating Novel Memory System Alternatives for Speculative Multithreaded Computer Systems
  • 17 Evaluation of Large L3 Caches Using TPC-H Trace Samples
  • 18 Exploiting Intelligent Memory for Database Workloads
  • Author Index

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