Hardware and Software: Verification and Testing Third International Haifa Verification Conference, HVC 2007, Haifa, Israel, October 23-25, 2007, Proceedings

Bibliographic Details
Other Authors: Yorav, Karen (Editor)
Format: eBook
Language:English
Published: Berlin, Heidelberg Springer Berlin Heidelberg 2008, 2008
Edition:1st ed. 2008
Series:Programming and Software Engineering
Subjects:
Online Access:
Collection: Springer eBooks 2005- - Collection details see MPG.ReNa
LEADER 02595nmm a2200313 u 4500
001 EB000380215
003 EBX01000000000000000233267
005 00000000000000.0
007 cr|||||||||||||||||||||
008 130626 ||| eng
020 |a 9783540779667 
100 1 |a Yorav, Karen  |e [editor] 
245 0 0 |a Hardware and Software: Verification and Testing  |h Elektronische Ressource  |b Third International Haifa Verification Conference, HVC 2007, Haifa, Israel, October 23-25, 2007, Proceedings  |c edited by Karen Yorav 
250 |a 1st ed. 2008 
260 |a Berlin, Heidelberg  |b Springer Berlin Heidelberg  |c 2008, 2008 
300 |a XII, 267 p  |b online resource 
505 0 |a Invited Talks -- Simulation vs. Formal: Absorb What Is Useful; Reject What Is Useless -- Scaling Commercial Verification to Larger Systems -- From Hardware Verification to Software Verification: Re-use and Re-learn -- Where Do Bugs Come from? -- HVC Award -- Symbolic Execution and Model Checking for Testing -- Hardware Verification -- On the Characterization of Until as a Fixed Point Under Clocked Semantics -- Reactivity in SystemC Transaction-Level Models -- Model Checking -- Verifying Parametrised Hardware Designs Via Counter Automata -- How Fast and Fat Is Your Probabilistic Model Checker? An Experimental Performance Comparison -- Dynamic Hardware Verification -- Constraint Patterns and Search Procedures for CP-Based Random Test Generation -- Using Virtual Coverage to Hit Hard-To-Reach Events -- Merging Formal and Testing -- Test Case Generation for Ultimately Periodic Paths -- Dynamic Testing Via Automata Learning -- Formal Verification for Software -- On the Architecture of System Verification Environments -- Exploiting Shared Structure in Software Verification Conditions -- Delayed Nondeterminism in Model Checking Embedded Systems Assembly Code -- A Complete Bounded Model Checking Algorithm for Pushdown Systems -- Software Testing -- Locating Regression Bugs -- The Advantages of Post-Link Code Coverage -- GenUTest: A Unit Test and Mock Aspect Generation Tool 
653 |a Compilers (Computer programs) 
653 |a Computer Science Logic and Foundations of Programming 
653 |a Compilers and Interpreters 
653 |a Software engineering 
653 |a Computer science 
653 |a Software Engineering 
041 0 7 |a eng  |2 ISO 639-2 
989 |b Springer  |a Springer eBooks 2005- 
490 0 |a Programming and Software Engineering 
028 5 0 |a 10.1007/978-3-540-77966-7 
856 4 0 |u https://doi.org/10.1007/978-3-540-77966-7?nosfx=y  |x Verlag  |3 Volltext 
082 0 |a 005.1