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1
by Monteiro, José, Devadas, Srinivas
Published 1997
Springer US
Table of Contents: “... Techniques for Low Power Circuits -- 5.1 Power Optimization by Transistor Sizing -- 5.2 Combinational Logic...”
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2
Published 2000
Springer US
Table of Contents: “... of Microprocessor Memory Structures -- Single Ended Pass-Transistor Logic — A Comparison with CMOS and CPL...”