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author_facet:"Taraate, Vaibbhav"
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1
ASIC
Design
and Synthesis : RTL Design Using Verilog
by
Taraate, Vaibbhav
Published 2021
Springer Nature Singapore
Table of Contents:
“
...Chapter 1. Introduction -- Chapter 2.
Design
using CMOS -- Chapter 3. ASIC
design
synthesis...
”
Read Now
2
PLD Based
Design
with VHDL : RTL Design, Synthesis and Implementation
by
Taraate, Vaibbhav
Published 2017
Springer Nature Singapore
Table of Contents:
“
... Constructs -- 4 Combinational Logic
Design
Using VHDL Constructs -- Sequential Logic
Design
-- Introduction...
”
Read Now
3
Digital
Design
Techniques and Exercises : A Practice Book for Digital Logic Design
by
Taraate, Vaibbhav
Published 2022
Springer Nature Singapore
Table of Contents:
“
...Basics of Digital
Design
--
Design
using Universal logic -- Combinational
Design
Resources -- Case...
”
Read Now
4
Digital Logic
Design
Using Verilog : Coding and RTL Synthesis
by
Taraate, Vaibbhav
Published 2016
Springer India
Table of Contents:
“
...Introduction -- Combinational Logic
Design
(Part I) -- Combinational Logic
Design
(Part II...
”
Read Now
5
Digital
Design
from the VLSI Perspective : Concepts for VLSI Beginners
by
Taraate, Vaibbhav
Published 2023
Springer Nature Singapore
Table of Contents:
“
...Introduction -- Basics of
Design
Elements -- System and Architecture
Design
-- Combinational Logic...
”
Read Now
6
Digital Logic
Design
Using Verilog : Coding and RTL Synthesis
by
Taraate, Vaibbhav
Published 2022
Springer Nature Singapore
Table of Contents:
“
...Introduction -- Combinational Logic
Design
(Part I) -- Combinational Logic
Design
(Part II...
”
Read Now
7
Logic Synthesis and SOC Prototyping : RTL Design using VHDL
by
Taraate, Vaibbhav
Published 2020
Springer Nature Singapore
Table of Contents:
“
...Introduction -- ASIC
Design
and SOC prototype --
Design
using VHDL & Guidelines --
Design
using...
”
Read Now
8
Advanced HDL Synthesis and SOC Prototyping : RTL Design Using Verilog
by
Taraate, Vaibbhav
Published 2019
Springer Nature Singapore
Table of Contents:
“
...Introduction -- SOC
Design
-- RTL
Design
Guidelines -- RTL
Design
and Verification -- Processor...
”
Read Now
9
SystemVerilog for Hardware Description : RTL Design and Verification
by
Taraate, Vaibbhav
Published 2020
Springer Nature Singapore
Table of Contents:
“
...Chapter 1: Introduction to FPGA
design
-- Chapter 2: Introduction to HDL -- Chapter 3:Introduction...
”
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9
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Taraate, Vaibbhav
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