Verilog coding for logic synthesis

A practical introduction to writing synthesizable Verilog code Rapid change in IC chip complexity and the pressure to design more complex IC chips at a faster pace has forced design engineers to find a more efficient and productive method to create schematics with large amounts of logic gates. This...

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Bibliographic Details
Main Author: Lee, Weng Fook
Format: eBook
Language:English
Published: Hoboken, N.J. Wiley-Interscience 2003
Subjects:
Online Access:
Collection: O'Reilly - Collection details see MPG.ReNa
Table of Contents:
  • Introduction
  • Asic design flow
  • Verilog coding
  • Coding style : best-known method for synthesis
  • Design example of programmable timer
  • Design example of programmable logic block for peripheral interface
  • Includes bibliographical references (page 307) and index