Engineering the CMOS library enhancing digital design kits for competitive silicon
"This book is about gaining a competitive edge in the Integrated Circuit IC marketplace. It suggests that there is an unrecognized value hidden in the safety margins of descriptive views in any piece of intellectual property (IP). This hidden value is normally left on the table. However, it can...
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| Format: | eBook |
| Language: | English |
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Hoboken, N.J.
John Wiley & Sons
2012
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| Collection: | O'Reilly - Collection details see MPG.ReNa |
| Summary: | "This book is about gaining a competitive edge in the Integrated Circuit IC marketplace. It suggests that there is an unrecognized value hidden in the safety margins of descriptive views in any piece of intellectual property (IP). This hidden value is normally left on the table. However, it can be used by the aggressive design engineer (or manager) to surpass the competition in the marketplace. This text reveals how the typical design house can enhance performance, reduce power, and improve the density of standard-cell logic. It will show how to add value to the generic, foundry-provided standard-cell library that most companies use without modification. Lastly, it identifies the low-risk opportunities aggressive designers and managers can employ to improve margin from overdesigned standard cells."-- "This book is about gaining a competitive edge in the Integrated Circuit IC marketplace"-- |
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| Physical Description: | iv, 327 pages illustrations |
| ISBN: | 9781118273111 9786613621894 1280592060 9781118273142 1118273141 9781280592065 1118273117 1118273133 9781118273135 |