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170203 ||| eng |
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|a 9783319490250
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| 100 |
1 |
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|a Mishra, Prabhat
|e [editor]
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| 245 |
0 |
0 |
|a Hardware IP Security and Trust
|h Elektronische Ressource
|c edited by Prabhat Mishra, Swarup Bhunia, Mark Tehranipoor
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| 250 |
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|a 1st ed. 2017
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| 260 |
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|a Cham
|b Springer International Publishing
|c 2017, 2017
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| 300 |
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|a XII, 353 p. 131 illus., 78 illus. in color
|b online resource
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| 505 |
0 |
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|a Part I. Introduction -- Chapter 1.Security and Trust Vulnerabilities in Third-party IPs -- PArt II.Trust Analysis -- Chapter 2.Security Rule Check -- Chapter 3.Digital Circuit Vulnerabilities to Hardware Trojans -- Chapter 4.Code Coverage Analysis for IP Trust Verification -- Chapter 5.Analyzing Circuit Layout to Probing Attack -- Chapter 6.Testing of Side Channel Leakage of Cryptographic IPs: Metrics and Evaluations -- Part III -- Effective Countermeasures -- Chapter 7.Hardware Hardening Approaches using Camouflaging, Encryption and Obfuscation -- Chapter 8.A Novel Mutating Runtime Architecture for Embedding Multiple Countermeasures Against Passive Side Channel Attacks -- Part IV -- Chapter 9.Validation of IP Security and Trust -- Chapter 10.IP Trust Validation using Proof-carrying Hardware -- Chapter 11. Hardware Trust Verification -- Chapter 12.Verification of Unspecified IP Functionality -- Chapter 13.Verifying Security Properties in Modern SoCs using Instruction-level Abstractions -- Chapter 14. Test Generation for Detection of Malicious Parametric Variations -- Part V. Conclusions -- Chapter 15.The Future of Trustworthy SoC Design
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| 653 |
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|a Electronics and Microelectronics, Instrumentation
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| 653 |
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|a Cryptography
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| 653 |
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|a Electronic circuits
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| 653 |
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|a Data protection
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| 653 |
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|a Data encryption (Computer science)
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| 653 |
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|a Processor Architectures
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| 653 |
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|a Cryptology
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| 653 |
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|a Microprocessors
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| 653 |
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|a Electronics
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| 653 |
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|a Electronic Circuits and Systems
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| 653 |
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|a Data and Information Security
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| 653 |
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|a Computer architecture
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| 700 |
1 |
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|a Bhunia, Swarup
|e [editor]
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| 700 |
1 |
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|a Tehranipoor, Mark
|e [editor]
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| 041 |
0 |
7 |
|a eng
|2 ISO 639-2
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| 989 |
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|b Springer
|a Springer eBooks 2005-
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| 028 |
5 |
0 |
|a 10.1007/978-3-319-49025-0
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| 856 |
4 |
0 |
|u https://doi.org/10.1007/978-3-319-49025-0?nosfx=y
|x Verlag
|3 Volltext
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| 082 |
0 |
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|a 621.3815
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| 520 |
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|a This book provides an overview of current Intellectual Property (IP) based System-on-Chip (SoC) design methodology and highlights how security of IP can be compromised at various stages in the overall SoC design-fabrication-deployment cycle. Readers will gain a comprehensive understanding of the security vulnerabilities of different types of IPs. This book would enable readers to overcome these vulnerabilities through an efficient combination of proactive countermeasures and design-for-security solutions, as well as a wide variety of IP security and trust assessment and validation techniques. This book serves as a single-source of reference for system designers and practitioners for designing secure, reliable and trustworthy SoCs
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