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150107 ||| eng |
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|a 9783319123707
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| 100 |
1 |
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|a Rebeiro, Chester
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| 245 |
0 |
0 |
|a Timing Channels in Cryptography
|h Elektronische Ressource
|b A Micro-Architectural Perspective
|c by Chester Rebeiro, Debdeep Mukhopadhyay, Sarani Bhattacharya
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| 250 |
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|a 1st ed. 2015
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| 260 |
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|a Cham
|b Springer International Publishing
|c 2015, 2015
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| 300 |
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|a XVII, 152 p. 75 illus., 14 illus. in color
|b online resource
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| 505 |
0 |
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|a An Introduction to Timing Attacks -- Modern Cryptography -- Superscalar Processors, Cache Memories, and Branch Predictors -- Time-Driven Cache Attacks -- Advanced Time-Driven Cache Attacks on Block Ciphers -- A Formal Analysis of Time-Driven Cache Attacks -- Profiled Time-Driven Cache Attacks on Block Ciphers -- Access-Driven Cache Attacks on Block Ciphers -- Branch Prediction Attacks -- Countermeasures for Timing Attacks
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| 653 |
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|a Data Structures and Information Theory
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| 653 |
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|a Information theory
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| 653 |
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|a Signal, Speech and Image Processing
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| 653 |
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|a Data structures (Computer science)
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| 653 |
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|a Signal processing
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| 700 |
1 |
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|a Mukhopadhyay, Debdeep
|e [author]
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| 700 |
1 |
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|a Bhattacharya, Sarani
|e [author]
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| 041 |
0 |
7 |
|a eng
|2 ISO 639-2
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| 989 |
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|b Springer
|a Springer eBooks 2005-
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| 028 |
5 |
0 |
|a 10.1007/978-3-319-12370-7
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| 856 |
4 |
0 |
|u https://doi.org/10.1007/978-3-319-12370-7?nosfx=y
|x Verlag
|3 Volltext
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| 082 |
0 |
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|a 621.382
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| 520 |
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|a This book deals with timing attacks on software implementations of encryption algorithms. It describes and analyzes various unintended covert timing channels that are formed when ciphers are executed in microprocessors. Modern superscalar microprocessors are considered, which are enabled with features such as multi-threaded, pipelined, parallel, speculative, and out-of-order execution. Various timing attack algorithms are described and analyzed for block ciphers as well as public-key ciphers. The interplay between the cipher implementation, system architecture, and the attack's success is analyzed. Further hardware and software countermeasures are discussed with the aim of illustrating methods to build systems that can protect against these attacks. Discusses various timing attack algorithms in detail allowing readers to reconstruct the attack. Provides several experimental results to support the theoretical analysis provided in the book. Analyzes information leakage from cache memories and branch prediction units in the processor. Examines information leakage models that would help quantify leakage in a covert timing channels
|