MOSFET Models for VLSI Circuit Simulation : Theory and Practice

Metal Oxide Semiconductor (MOS) transistors are the basic building block ofMOS integrated circuits (I C). Very Large Scale Integrated (VLSI) circuits using MOS technology have emerged as the dominant technology in the semiconductor industry. Over the past decade, the complexity of MOS IC's has...

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Main Author: Arora, Narain D.
Corporate Author: SpringerLink (Online service)
Format: eBook
Language:English
Published: Vienna Springer Vienna 1993, 1993
Edition:1st ed. 1993
Series:Computational Microelectronics
Subjects:
Online Access:
Collection: Springer Book Archives -2004 - Collection details see MPG.ReNa
LEADER 07487nmm a2200469 u 4500
001 EB000709384
003 EBX01000000000000000562466
005 00000000000000.0
007 cr|||||||||||||||||||||
008 140122 ||| eng
020 |a 9783709192474 
100 1 |a Arora, Narain D. 
245 0 0 |a MOSFET Models for VLSI Circuit Simulation  |h Elektronische Ressource  |b Theory and Practice  |c by Narain D. Arora 
250 |a 1st ed. 1993 
260 |a Vienna  |b Springer Vienna  |c 1993, 1993 
300 |a XXII, 605 p  |b online resource 
505 0 |a 7.4 Short-Channel Charge Model -- 7.5 Limitations of the Quasi-Static Model -- 7.6 Small-Signal Model Parameters -- References -- 8 Modeling Hot-Carrier Effects -- 8.1 Substrate Current Model -- 8.2 Gate Current Model -- 8.3 Correlation of Gate and Substrate Current -- 8.4 Mechanism of MOSFET Degradation -- 8.5 Measure of Degradation—Device Lifetime -- 8.6 Impact of Degradation on Circuit Performance -- 8.7 Temperature Dependence of Device Degradation -- References -- 9 Data Acquisition and Model Parameter Measurements -- 9.1 Data Acquisition -- 9.2 Gate-Oxide Capacitance Measurement -- 9.3 Measurement of Doping Profile in Silicon -- 9.4 Measurement of Threshold Voltage -- 9.5 Determination of Body Factor ? -- 9.6 Flat Band Voltage -- 9.7 Drain Induced Barrier Lowering (DIBL) Parameter -- 9.8 Determination of Subthreshold Slope -- 9.9 Carrier Inversion Layer Mobility Measurement -- 9.10 Determination of Effective Channel Length and Width --  
505 0 |a 1 Overview -- 1.1 Circuit Design with MOSFETs -- 1.2 MOSFET Modeling -- 1.3 Model Parameter Determination -- 1.4 Interconnect Modeling -- 1.5 Subjects Covered -- References -- 2 Review of Basic Semiconductor and pn Junction Theory -- 2.1 Energy Band Model -- 2.2 Intrinsic Semiconductor -- 2.3 Extrinsic or Doped Semiconductor -- 2.4 Electrical Conduction -- 2.5 pn Junction at Equilibrium -- 2.6 Diode Current-Voltage Characteristics -- 2.7 Diode Dynamic Behavior -- 2.8 Real pn Junction -- 2.9 Diode Circuit Model -- 2.10 Temperature Dependent Diode Model Parameters -- References -- 3 MOS Transistor Structure and Operation -- 3.1 MOSFET Structure -- 3.2 MOSFET Characteristics -- 3.3 MOSFET Scaling -- 3.4 Hot-Carrier Effects -- 3.5 VLSI Device Structures -- 3.6 MOSFET Parasitic Elements -- 3.7 MOSFET Length and Width Definitions -- 3.8 MOSFET Circuit Models -- References -- 4 MOS Capacitor -- 4.1 MOS Capacitor with No Applied Voltage -- 4.2 MOS Capacitor at Non-Zero Bias --  
505 0 |a 12.3 Statistical Analysis with Parameter Correlation -- 12.4 Factor Analysis -- 12.5 Optimization Method -- References -- Appendix A. Important Properties of Silicon, Silicon Dioxide and Silicon Nitride at 300 K -- Appendix B. Some Important Physical Constants at 300 K -- Appendix C. Unit Conversion Factors -- Appendix D. Magnitude Prefixes -- Appendix F. Charge Based MOSFET Intrinsic Capacitances -- Appendix G. Linear Regression -- Appendix H. Basic Statistical and Probability Theory -- Appendix I. List of Widely Used Statistical Package Programs 
505 0 |a 4.3 Capacitance of MOS Structures -- 4.4 Deviation from Ideal C-V Curves -- 4.5 Anomalous C-V Curve (Polysilicon Depletion Effect) -- 4.6 MOS Capacitor Applications -- 4.7 Nonuniformly Doped Substrate and Flat Band Voltage -- References -- 5 Threshold Voltage -- 5.1 MOSFET with Uniformly Doped Substrate -- 5.2 Nonuniformly Doped MOSFET -- 5.3 Threshold Voltage Variations with Device Length andWidth -- 5.4 Temperature Dependence of the Threshold voltage -- References -- 6 MOSFET DC Model -- 6.1 Drain Current Calculations -- 6.2 Pao-Sah Model -- 6.3 Charge-Sheet Model -- 6.4 Piece-Wise Drain Current Model for EnhancementDevices -- 6.5 Drain Current Model for Depletion Devices -- 6.6 Effective Mobility -- 6.7 Short-Geometry Models -- 6.8 Impact of Source-Drain Resistance on Drain Current -- 6.9 Temperature Dependence of the Drain Current -- References -- 7 Dynamic Model -- 7.1 Intrinsic Charges and Capacitances -- 7.2 Charge-Based Capacitance Model -- 7.3 Long-Channel Charge Model --  
505 0 |a 9.11 Determination of Drain Saturation Voltage -- 9.12 Measurement of MOSFET Intrinsic Capacitances -- 9.13 Measurement of Gate Overlap Capacitance -- 9.14 Measurement of MOSFET Source/Drain Diode JunctionParameters -- References -- 10 Model Parameter Extraction Using Optimization Method -- 10.1 Model Parameter Extraction -- 10.2 Basics Definitions in Optimization -- 10.3 Optimization Methods -- 10.4 Some Remarks on Parameter Extraction Using OptimizationTechnique -- 10.5 Confidence Limits on Estimated Model Parameter -- 10.6 Parameter Extraction Using Optimizer -- References -- 11 SPICE Diode and MOSFET Models and Their Parameters -- 11.1 Diode Model -- 11.2 MOSFET Level 1 Model -- 11.3 MOSFET Level 2 Model -- 11.4 MOSFET Level 3 Model -- 11.5 MOSFET Level 4 Model -- 11.6 Comparison of the Four MOSFET Models -- References -- 12 Statistical Modeling and Worst-Case Design Parameters -- 12.1 Methods of Generating Worst Case Parameters -- 12.2 Model Parameter Sensitivity --  
653 |a Applied mathematics 
653 |a Software engineering 
653 |a Software Engineering/Programming and Operating Systems 
653 |a Engineering mathematics 
653 |a Electronic materials 
653 |a Mathematical and Computational Engineering 
653 |a Electronics and Microelectronics, Instrumentation 
653 |a Numerical analysis 
653 |a Electronics 
653 |a Numerical Analysis 
653 |a Optical materials 
653 |a Optical and Electronic Materials 
653 |a Microelectronics 
710 2 |a SpringerLink (Online service) 
041 0 7 |a eng  |2 ISO 639-2 
989 |b SBA  |a Springer Book Archives -2004 
490 0 |a Computational Microelectronics 
856 |u https://doi.org/10.1007/978-3-7091-9247-4?nosfx=y  |x Verlag  |3 Volltext 
082 0 |a 005.1 
520 |a Metal Oxide Semiconductor (MOS) transistors are the basic building block ofMOS integrated circuits (I C). Very Large Scale Integrated (VLSI) circuits using MOS technology have emerged as the dominant technology in the semiconductor industry. Over the past decade, the complexity of MOS IC's has increased at an astonishing rate. This is realized mainly through the reduction of MOS transistor dimensions in addition to the improvements in processing. Today VLSI circuits with over 3 million transistors on a chip, with effective or electrical channel lengths of 0. 5 microns, are in volume production. Designing such complex chips is virtually impossible without simulation tools which help to predict circuit behavior before actual circuits are fabricated. However, the utility of simulators as a tool for the design and analysis of circuits depends on the adequacy of the device models used in the simulator. This problem is further aggravated by the technology trend towards smaller and smaller device dimensions which increases the complexity of the models. There is extensive literature available on modeling these short channel devices. However, there is a lot of confusion too. Often it is not clear what model to use and which model parameter values are important and how to determine them. After working over 15 years in the field of semiconductor device modeling, I have felt the need for a book which can fill the gap between the theory and the practice of MOS transistor modeling. This book is an attempt in that direction