Software and Compilers for Embedded Systems 8th International Workshop, SCOPES 2004, Amsterdam, The Netherlands, September 2-3, 2004, Proceedings

This volume contains the proceedings of the 8th International Workshop on Software and Compilers for Embedded Systems (SCOPES 2004) held in A- terdam, The Netherlands, on September 2 and 3, 2004. Initially, the workshop was referred to as the International Workshop on Code Generation for Emb- ded Sy...

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Bibliographic Details
Other Authors: Schepers, Henk (Editor)
Format: eBook
Language:English
Published: Berlin, Heidelberg Springer Berlin Heidelberg 2004, 2004
Edition:1st ed. 2004
Series:Lecture Notes in Computer Science
Subjects:
Online Access:
Collection: Springer Book Archives -2004 - Collection details see MPG.ReNa
Table of Contents:
  • Invited Talk
  • The New Economics of Embedded Systems
  • Application Specific (Co)Design
  • A Framework for Architectural Description of Embedded System
  • Automatically Customising VLIW Architectures with Coarse Grained Application-Specific Functional Units
  • ASIP Architecture Exploration for Efficient Ipsec Encryption: A Case Study
  • System and Application Synthesis
  • Compact Procedural Implementation in DSP Software Synthesis Through Recursive Graph Decomposition
  • An Integer Linear Programming Approach to Classify the Communication in Process Networks
  • Predictable Embedded Multiprocessor System Design
  • Data Flow Analysis
  • Suppression of Redundant Operations in Reverse Compiled Code Using Global Dataflow Analysis
  • Fast Points-to Analysis for Languages with Structured Types
  • Data Partitioning
  • An Automated C++ Code and Data Partitioning Framework for Data Management of Data-Intensive Applications
  • Combined Data Partitioning and Loop Nest Splitting for Energy Consumption Minimization
  • On the Phase Coupling Problem Between Data Memory Layout Generation and Address Pointer Assignment
  • Task Scheduling
  • Dynamic Mapping and Ordering Tasks of Embedded Real-Time Systems on Multiprocessor Platforms
  • Integrated Intra- and Inter-task Cache Analysis for Preemptive Multi-tasking Real-Time Systems
  • A Fuzzy Adaptive Algorithm for Fine Grained Cache Paging
  • Code Generation
  • DSP Code Generation with Optimized Data Word-Length Selection
  • Instruction Selection for Compilers That Target Architectures with Echo Instructions
  • A Flexible Tradeoff Between Code Size and WCET Using a Dual Instruction Set Processor