Analog Circuit Design High-Speed Analog-to-Digital Converters, Mixed Signal Design; PLLs and Synthesizers
This book contains the extended and revised editions of all the talks of the ninth AACD Workshop held in Hotel Bachmair, April 11 - 13 2000 in Rottach-Egem, Germany. The local organization was managed by Rudolf Koch of Infineon Technologies AG, Munich, Germany. The program consisted of six tutorials...
| Other Authors: | , , |
|---|---|
| Format: | eBook |
| Language: | English |
| Published: |
New York, NY
Springer US
2000, 2000
|
| Edition: | 1st ed. 2000 |
| Subjects: | |
| Online Access: | |
| Collection: | Springer Book Archives -2004 - Collection details see MPG.ReNa |
Table of Contents:
- I: High-Speed Analog-to-Digital Converters
- Speed-Power-Accuracy Trade-off in high-speed Analog-to-digital converters: Now in the future...
- A dual mode 700 Msamples/s 6-bit, 200 Msamples/s 7-bit A/D converter in 0.25 micron digital CMOS
- A 3.3 V 12b 50-Ms/s A/D converter in 0.6 micron CMOS with over 80-dB SFDR
- A 10-bit 20–30 MSPS CMOS subranging ADC with 9.5 Effective bits at Nyquist
- A 2.5 MHz output-rate delta-sigma ADC with 90dB SNR and 102dB SFDR
- A 13-bit bandpass sigma-delta modulator for 10.7 MHz digital IF with a 40 MHz sampling rate
- II: Mixed Signal Design
- System-level design issues for mixed-signal ICs and telecom frontends
- Mixed signal: Design issues
- Top-down design of mixed-signal circuits
- Computer aided design for integrated systems
- Mixed mode sigma-delta ADC design for high-quality audio
- Mixed mode telecom design
- III: PLL’s and Synthesizers
- On placing multiple inductor-based VCOs on the same mixed-signal substrate
- Fully integrated CMOS frequency synthesizers for wireless communications
- Design and optimization of RFCMOS-circuits for integrated PLL’s and synthesizers
- Frequency synthesis for integrated transceivers
- PLL frequency synthesizers: Phase noise issues and wide-band loops
- Low-power circuits for RF-frequency synthesizers in the low GHz range