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Reuse Methodology Manual for System-On-A-Chip Designs

Silicon technology now allows us to build chips consisting of tens of millions of transistors. This technology promises new levels of system integration onto a single chip, but also presents significant challenges to the chip designer. As a result, many ASIC developers and silicon vendors are re-exa...

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Bibliographic Details
Main Author: Bricaud, Pierre
Format: eBook
Language:English
Published: New York, NY Springer US 1998, 1998
Edition:1st ed. 1998
Subjects:
Computer-aided Engineering (cad, Cae) And Design
Electrical And Electronic Engineering
Electrical Engineering
Computers
Computer Hardware
Electronic Circuits
Computer-aided Engineering
Electronic Circuits And Systems
Online Access:
Collection: Springer Book Archives -2004 - Collection details see MPG.ReNa
Table of Contents:
  • 1 Introduction
  • 2 The System-on-a-Chip Design Process
  • 3 System-Level Design Issues: Rules and Tools
  • 4 The Macro Design Process
  • 5 RTL Coding Guidelines
  • 6 Macro Synthesis Guidelines
  • 7 Macro Verification Guidelines
  • 8 Developing Hard Macros
  • 9 Macro Deployment: Packaging for Reuse
  • 10 System Integration with Reusable Macros
  • 11 System-Level Verification Issues
  • 12 Data and Project Management
  • 13 Implementing a Reuse Process

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