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131104 ||| eng |
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|a 9783319030777
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| 100 |
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|a Bertacco, Valeria
|e [editor]
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| 245 |
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|a Hardware and Software: Verification and Testing
|h Elektronische Ressource
|b 9th International Haifa Verification Conference, HVC 2013, Haifa, Israel, November 5-7, 2013, Proceedings
|c edited by Valeria Bertacco, Axel Legay
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| 250 |
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|a 1st ed. 2013
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| 260 |
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|a Cham
|b Springer International Publishing
|c 2013, 2013
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| 300 |
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|a XX, 366 p. 147 illus
|b online resource
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|a Backbones for Equality -- PASS: String Solving with Parameterized Array and Interval Automaton -- Increasing Confidence in Liveness Model Checking Results with Proofs Speeding Up the Safety Verification of Programmable Logic Controller Code -- Modeling Firmware as Service Functions and Its Application to Test Generation -- Symbolic Model-Based Testing for Industrial Automation Software -- Online Testing of LTL Properties for Java Code -- Modbat: A Model-Based API Tester for Event-Driven Systems -- Predictive Taint Analysis for Extended Testing of Parallel Executions -- Continuous Integration for Web-Based Software Infrastructures: Lessons Learned on the webinos Project -- SLAM: SLice And Merge - Effective Test Generation for Large Systems -- Improving Post-silicon Validation Efficiency by Using Pre-generated Data -- Development and Verification of Complex Hybrid Systems Using Synthesizable Monitors -- Assertion Checking Using Dynamic Inference -- Formal Specification of an Erase Block Management Layer for Flash Memory -- Attention-Based Coverage Metrics Synthesizing, Correcting and Improving Code, Using Model Checking-Based Genetic Programming -- Domain Types: Abstract-Domain Selection Based on Variable Usage -- Efficient Analysis of Reliability Architectures via Predicate Abstraction -- Lazy Symbolic Execution through Abstraction and Sub-space Search -- SPIN as a Linearizability Checker under Weak Memory Models -- Arithmetic Bit-Level Verification Using Network Flow Model -- Performance Evaluation of Process Partitioning Using Probabilistic Model Checking -- Improving Representative Computation in ExpliSAT.
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| 653 |
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|a Computer Communication Networks
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| 653 |
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|a Compilers (Computer programs)
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| 653 |
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|a Computer Science Logic and Foundations of Programming
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| 653 |
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|a Compilers and Interpreters
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| 653 |
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|a Software engineering
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| 653 |
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|a Computer science
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| 653 |
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|a Artificial Intelligence
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| 653 |
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|a Software Engineering
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| 653 |
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|a Formal Languages and Automata Theory
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| 653 |
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|a Computer networks
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| 653 |
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|a Machine theory
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| 653 |
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|a Artificial intelligence
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| 700 |
1 |
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|a Legay, Axel
|e [editor]
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| 041 |
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7 |
|a eng
|2 ISO 639-2
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| 989 |
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|b Springer
|a Springer eBooks 2005-
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| 490 |
0 |
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|a Programming and Software Engineering
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| 028 |
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|a 10.1007/978-3-319-03077-7
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| 856 |
4 |
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|u https://doi.org/10.1007/978-3-319-03077-7?nosfx=y
|x Verlag
|3 Volltext
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| 082 |
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|a 005.1
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| 520 |
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|a This book constitutes the refereed proceedings of the 9th International Haifa Verification Conference, HVC 2013, held in Haifa, Israel in November 2013. The 24 revised full papers presented were carefully reviewed and selected from 49 submissions. The papers are organized in topical sections on SAT and SMT-based verification, software testing, supporting dynamic verification, specification and coverage, abstraction and model presentation
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