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131104 ||| eng |
020 |
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|a 9783319023816
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100 |
1 |
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|a Kim, Chulwoo
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245 |
0 |
0 |
|a High-Bandwidth Memory Interface
|h Elektronische Ressource
|c by Chulwoo Kim, Hyun-Woo Lee, Junyoung Song
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250 |
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|a 1st ed. 2014
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260 |
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|a Cham
|b Springer International Publishing
|c 2014, 2014
|
300 |
|
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|a VIII, 88 p. 91 illus., 41 illus. in color
|b online resource
|
505 |
0 |
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|a An introduction to high-speed DRAM -- An I/O Line Configuration and Organization of DRAM -- Clock generation and distribution -- Transceiver Design -- TSV Interface for DRAM.
|
653 |
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|a Electronics and Microelectronics, Instrumentation
|
653 |
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|a Electronic circuits
|
653 |
|
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|a Electronics
|
653 |
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|a Electronic Circuits and Systems
|
700 |
1 |
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|a Lee, Hyun-Woo
|e [author]
|
700 |
1 |
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|a Song, Junyoung
|e [author]
|
041 |
0 |
7 |
|a eng
|2 ISO 639-2
|
989 |
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|b Springer
|a Springer eBooks 2005-
|
490 |
0 |
|
|a SpringerBriefs in Electrical and Computer Engineering
|
028 |
5 |
0 |
|a 10.1007/978-3-319-02381-6
|
856 |
4 |
0 |
|u https://doi.org/10.1007/978-3-319-02381-6?nosfx=y
|x Verlag
|3 Volltext
|
082 |
0 |
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|a 621.3815
|
520 |
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|a This book provides an overview of recent advances in memory interface design at both the architecture and circuit levels. Coverage includes signal integrity and testing, TSV interface, high-speed serial interface including equalization, ODT, pre-emphasis, wide I/O interface including crosstalk, skew cancellation, and clock generation and distribution. Trends for further bandwidth enhancement are also covered. • Enables readers with minimal background in memory design to understand the basics of high-bandwidth memory interface design; • Presents state-of-the-art techniques for memory interface design; • Covers memory interface design at both the circuit level and system architecture level
|