Pipelined ADC Design and Enhancement Techniques
Pipelined ADCs have seen phenomenal improvements in performance over the last few years. As such, when designing a pipelined ADC a clear understanding of the design tradeoffs, and state of the art techniques is required to implement today's high performance low power ADCs. Written for both rese...
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| Format: | eBook |
| Language: | English |
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Dordrecht
Springer Netherlands
2010, 2010
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| Edition: | 1st ed. 2010 |
| Series: | Analog Circuits and Signal Processing
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| Subjects: | |
| Online Access: | |
| Collection: | Springer eBooks 2005- - Collection details see MPG.ReNa |
Table of Contents:
- Pipelined ADC Design
- ADC Architectures
- Pipelined ADC Architecture Overview
- Scaling Power with Sampling Rate in an ADC
- State of the Art Pipelined ADC Design
- Pipelined ADC Enhancement Techniques
- Rapid Calibration of DAC and Gain Errors in a Multi-bit Pipeline Stage
- A Power Scalable and Low Power Pipelined ADC
- A Sub-sampling ADC with Embedded Sample-and-Hold
- A Capacitive Charge Pump Based Low Power Pipelined ADC
- Summary