Low Power RF Circuit Design in Standard CMOS Technology

Low Power Consumption is one of the critical issues in the performance of small battery-powered handheld devices. Mobile terminals feature an ever increasing number of wireless communication alternatives including GPS, Bluetooth, GSM, 3G, WiFi or DVB-H. Considering that the total power available for...

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Main Authors: Alvarado, Unai, Bistué, Guillermo (Author), Adín, Iñigo (Author)
Corporate Author: SpringerLink (Online service)
Format: eBook
Language:English
Published: Berlin, Heidelberg Springer Berlin Heidelberg 2012, 2012
Edition:1st ed. 2012
Series:Lecture Notes in Electrical Engineering
Subjects:
Online Access:
Collection: Springer eBooks 2005- - Collection details see MPG.ReNa
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245 0 0 |a Low Power RF Circuit Design in Standard CMOS Technology  |h Elektronische Ressource  |c by Unai Alvarado, Guillermo Bistué, Iñigo Adín 
250 |a 1st ed. 2012 
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505 0 |a Introduction -- Power Considerations in Analog Rf CMOS Circuits -- Impact of Architecture Selection on RF Front-End Power Consumption -- Technology Structural Alternatives in Standard CMOS Technologies for Low-Power Analog Design -- Schematic Design Techniques for Power Saving in RF -- RF Amplifier Design -- Mixer Design -- Phase Locked Loop (PLL) Design 
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653 |a Communications Engineering, Networks 
653 |a Electronics and Microelectronics, Instrumentation 
653 |a Systems engineering 
653 |a Circuits and Systems 
653 |a Microwaves 
653 |a Telecommunication 
653 |a Electronics 
700 1 |a Bistué, Guillermo  |e [author] 
700 1 |a Adín, Iñigo  |e [author] 
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520 |a Low Power Consumption is one of the critical issues in the performance of small battery-powered handheld devices. Mobile terminals feature an ever increasing number of wireless communication alternatives including GPS, Bluetooth, GSM, 3G, WiFi or DVB-H. Considering that the total power available for each terminal is limited by the relatively slow increase in battery performance expected in the near future, the need for efficient circuits is now critical. This book presents the basic techniques available to design low power RF CMOS analogue circuits. It gives circuit designers a complete guide of alternatives to optimize power consumption and explains the application of these rules in the most common RF building blocks: LNA, mixers and PLLs. It is set out using practical examples and offers a unique perspective as it targets designers working within the standard CMOS process and all the limitations inherent in these technologies