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Power-Aware Computer Systems Third International Workshop, PACS 2003, San Diego, CA, USA, December 1, 2003, Revised Papers

Welcome to the proceedings of the 3rd Power-Aware Computer Systems (PACS 2003) Workshop held in conjunction with the 36th Annual International Symposium on Microarchitecture (MICRO-36). The increase in power and - ergy dissipation in computer systems has begun to limit performance and has also resul...

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Bibliographic Details
Other Authors: Falsafi, Babak (Editor), Vijaykumar, T. N. (Editor)
Format: eBook
Language:English
Published: Berlin, Heidelberg Springer Berlin Heidelberg 2005, 2005
Edition:1st ed. 2005
Series:Lecture Notes in Computer Science
Subjects:
Computer Systems
Operating Systems
Electronics And Microelectronics, Instrumentation
Computer System Implementation
Operating Systems (computers)
Electrical And Electronic Engineering
Electrical Engineering
Computers
Computer Networks 
Computer Hardware
Computer Engineering And Networks
Electronics
Computer Engineering
Online Access:
Collection: Springer eBooks 2005- - Collection details see MPG.ReNa
Table of Contents:
  • Compilers
  • Runtime Biased Pointer Reuse Analysis and Its Application to Energy Efficiency
  • Inter-program Compilation for Disk Energy Reduction
  • Embedded Systems
  • Energy Consumption in Mobile Devices: Why Future Systems Need Requirements–Aware Energy Scale-Down
  • Efficient Scratchpad Allocation Algorithms for Energy Constrained Embedded Systems
  • Online Prediction of Battery Lifetime for Embedded and Mobile Devices
  • Synchroscalar: Initial Lessons in Power-Aware Design of a Tile-Based Embedded Architecture
  • Heterogeneous Wireless Network Management
  • Microarchitectural Techniques
  • “Look It Up” or “Do the Math”: An Energy, Area, and Timing Analysis of Instruction Reuse and Memoization
  • CPU Packing for Multiprocessor Power Reduction
  • Exploring the Potential of Architecture-Level Power Optimizations
  • Coupled Power and Thermal Simulation with Active Cooling
  • Cache and Memory Systems
  • The Synergy Between Power-Aware Memory Systems and Processor Voltage Scaling
  • Hot-and-Cold: Using Criticality in the Design of Energy-Efficient Caches
  • PARROT: Power Awareness Through Selective Dynamically Optimized Traces

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